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Design Decisions in the PCM-1


Sale, AHJ, Design Decisions in the PCM-1, Journal of Electrical and Electronics Engineering, Australia, 11, (2) pp. 82-86. ISSN 0725-2986 (1991) [Refereed Article]


The PCM-1 processor has an innovative computer architecture for the fast execution of functional programming languages by graph reduction. Expected performance is about 50 Mips (internally) realizing 0.5 million reductions/s. RISC principles have influenced the processor design. This paper analyses significant architectural decisions made in the PCM-1 and show how is RISC-like design achieves high performance. The application of RISC principles to a machine not designed for procedural programming are discussed, including the instruction sequencing, accommodation of slow operations such as addition, the substitution of software analysis for hardware, a cache on the chip, and matching of the register file and control store cycles.

Item Details

Item Type:Refereed Article
Research Division:Technology
Research Group:Computer Hardware
Research Field:Computer Hardware not elsewhere classified
Objective Division:Information and Communication Services
Objective Group:Other Information and Communication Services
Objective Field:Information and Communication Services not elsewhere classified
UTAS Author:Sale, AHJ (Professor Arthur Sale)
ID Code:34323
Year Published:1991
Deposited By:Computing
Deposited On:2005-07-27
Last Modified:2005-07-27

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